Nowadays, development of technologies for computer systems has enabled various peripheral devices to be connected with an existing computer system, so as to meet users' requirements. For example, a computer system may be equipped with embedded or external peripheral devices, so as to store or access data. As such peripheral devices described above, there may be enumerated embedded, internal or external hard drives, compact disc (CD) players, digital video disc (DVD) players, compact disc-recordables (CD-Rs), etc.
In order to enable such peripheral devices as described above to be connected with each other; a computer system generally employs a motherboard in which at least one Integrated Drive Electronics (IDE) connector and at least one Peripheral Component Interconnect (PCI) connector are embedded. The IDE connector is utilized mainly in connecting embedded or internal devices such as hard drives and CD-ROM drives. A host adaptor card is inserted in the PCI connector and used in connecting either embedded, internal or external devices.
In the process of developing a computer system as described above, there is required a test for confirming connections between the computer system and peripheral devices and operations of the connected peripheral devices. As one step of such a test, there exists a PCI host controller test. The PCI host controller participates in data communication between a system bus in the computer system and a PCI bus connected with peripheral devices. This data communication signifies communication which determines whether a system bus is in use or not and allows the system bus to be used in response to request signals from peripheral devices requiring use of the system bus. In order to perform the PCI controller test, information about functions of the peripheral devices must be stored in advance. Usually, the information is programmed and stored in a Field Programmable Gate Array (FPGA).
U.S. Pat. No. 6,057,708 (the '708 patent) discloses technology for programming information of peripheral devices in an FPGA in order to emulate a computer system. The '708 patent discloses an FPGA which includes a bus bridge circuit, a programmable logic array, a dedicated internal bus, and a plurality of dedicated bus interface circuits. The FPGA is coupled to an external bus through the bus bridge circuit, and the dedicated bus interface circuits are connected with the dedicated internal bus. The programmable logic array includes an array of configurable logic blocks (CLBs) and programmable interconnect circuitry. The configurable logic blocks are connected with the dedicated bus interface circuits through the programmable interconnect circuitry, respectively.
However, in the '708 patent, several input and output pins of the FPGA are used in connecting the bus bridge circuit with the external bus, so that the number of available pins is reduced. As a result, it may be impossible to connect some peripheral devices requiring many input and output ports with the FPGA. Further, in the '708 patent, since the FPGA contains a bus bridge circuit, the programmable area is reduced by the amount corresponding to the blocks taken by the bus bridge circuit.